June 30th 2024, Buenos Aires, Argentina
In conjunction with the 51st International Symposium
on Computer Architecture (ISCA 2024)
Artificial Intelligence (AI) and Machine Learning (ML) techniques have become the de facto solution to drive human progress and more specifically, automation. In the last years, the world’s economy has been gravitating towards the AI/ML domain (from industrial and scientific perspectives) and the expectation of growth has only been increasing with the rapid rate of innovation and commercial deployments.
Over the past 7 editions, the CogArch workshop has brought together experts and knowledge on the most novel design ideas for cognitive systems. This workshop capitalizes on the synergy between industrial and academic efforts in order to provide a better understanding of cognitive systems and key concepts of their design. In particular, while previous editions of the workshop have attempted to address co-designed hardware-software architectures that enable the latest advancements in machine learning, this edition focuses on applying state-of-the-art machine learning models towards realizing novel processor architectures and design. Architecting, designing, verifying and manufacturing commercial-grade processor requires hundreds of highly skilled designers, complex toolflows and a time-to-market of several months to years, and leveraging AI techniques at various stages in the design cycle can serve to significantly ease these constraints.
The CogArch workshop has already had seven successful editions, bringing together experts and knowledge on the most novel design ideas for cognitive systems. This workshop capitalizes on the synergy between industrial and academic efforts in order to provide a better understanding of cognitive systems and key enablers of their design.
Hardware and software design considerations are gravitating towards AI applications, as those have been proven extremely useful in a wide variety of fields, from edge computing in autonomous cars, to cloud-based computing for personalized medicine. Recent efforts to utilize AI for hardware design have been gaining traction. AI models have been shown to be effective in tackling complex challenges in the EDA world when applied to automatic place-and-route, design of novel architectures, leveraging new material/packaging technologies or even optimizing manufacturing processes.
The CogArch workshop solicits formative ideas and new product offerings in the general space of AI systems that are applied towards designing of next generation processing systems, at every stage of conceptualization, design, testing, verification and manufacturing.
Topics of interest include (but are not limited to):The workshop will consist of regular presentations and/or prototype demonstrations by authors of selected submissions. In addition, it will include invited keynotes by eminent researchers as well as interactive panel discussions to kindle further interest in these research topics. Submissions will be reviewed by a Workshop Selection Committee comprising of experts from industry and academia. Keeping in mind the cross-disciplinary nature of this workshop, this committee will consist of researchers with diverse interests covering the spectrum of design automation, testing/verification, architecture, and machine learning.
Submitted manuscripts must be in English of up to 2 pages (with same
formatting guidelines as main
conference). Submissions should be submitted to the following
link by
April 11th April 20th, 2024.
If you have questions regarding submission, please contact us:
info@cogarchworkshop.org
Karthik Swaminathan is a Senior Research Scientist at the IBM T.J Watson Research Center. His research has a broad, cross-layer scope examining circuit, architecture and application level optimizations for improving the reliability and energy efficiency of multi core systems and accelerators. He has also worked on characterizing performance and reliability of IBM server-class and mainframe processors at various stages of design.
Subhankar Pal is a Research Staff Member at IBM T. J. Watson Research Center. His research is focused on SoC design methodologies and hardware-software co-design for privacy-preserving machine learning. He holds a Ph.D. and M.S. from the University of Michigan. His Ph.D. thesis looked at designing a reconfigurable, software-defined hardware solution that balances programmability with energy efficiency. Prior to that, Subhankar was with NVIDIA, where he worked on pre-silicon verification and bring-up of multiple generations of GPUs.
Aporva Amarnath is a Research Scientist at the IBM T. J. Watson Research Center. She is interested in developing memory system architectures for emerging applications using existing and new memory technologies to tackle the memory wall. Her research interests include, developing memory system architectures for emerging applications using existing and new memory technologies, creating energy-efficient accelerators for HPC applications and developing schedulers for real-time constrained AV applications. She holds a PhD from the University of Michigan.
Ananda Samajdar is a Research Staff Member at IBM T. J. Watson Research Center working on accelerator design and compilation/mapping strategies for DNN workloads on IBM’s RaPiD AI accelerator. He holds a Ph.D. from Georgia Tech.
The AI and Robotics Timeline from 1939 to date
The AI portal with the latest research activities conducted by IBM on AI
The Foundation Models portal
IBM Watson in action in this text-to-speech demo
CogArch will be held in conjunction with the 51st International Symposium on Computer Architecture (ISCA 2024). Refer to the main venue to continue with the registration process.
Hilton Buenos Aires
Macacha Güemes 351, C1106BKG
Buenos Aires, Argentina