Call for Papers

Artificial Intelligence (AI) and Machine Learning (ML) techniques have become the de facto solution to drive human progress and more specifically, automation. In the last few years, the world’s economy has been gravitating towards the AI/ML domain (from industrial and scientific perspectives) and the expectation of growth has only been increasing with the rapid rate of innovation and commercial deployments.
Over the past eight editions, the CogArch workshop has brought together experts and knowledge on the most novel design ideas for cognitive systems. This workshop capitalizes on the synergy between industrial and academic efforts in order to provide a better understanding of cognitive systems and key concepts of their design. This particular edition emphasizes the challenges associated with the implementation of generative AI and the integration of chiplets as a means to fully realize its potential. As generative AI models continue to expand in size and complexity, the resulting computational demands impact the entire software-hardware ecosystem. This creates a variety of new challenges that necessitate unconventional strategies to maintain scalability in both upward and outward directions. With Large Language Model (LLM) parameter sizes approaching several billions, chiplet-based architectures represent a promising technological advancement that could enable a cost-effective and energy-efficient solution for processing such models, thus potentially transforming the future landscape of cognitive systems.
The CogArch workshop solicits formative ideas and new product offerings in the general space of AI systems that covers all the design aspects of cognitive systems, with particular focus this year on the adoption of chiplets as a promising way to support large-scale generative AI.

Topics of interest include (but are not limited to):

  • 2.5D/3D chiplet architectures, along with wafer scaling and various heterogeneous integration methods, including optical heterogeneous integration, to create scalable frameworks for generative AI models.
  • Development of software and compiler frameworks for large-scale deployment of generative AI models.
  • Hardware-software co-design for commercially deployed AI hardware acceleration frameworks.
  • Accelerators and micro-architectural support for LLMs.
  • Reliability and safety considerations, and security against adversarial attacks in cognitive architectures.
  • Techniques for improving energy efficiency of AI applications, and battery life extension and endurance in mobile AI architectures.
  • AI/ML for fast system modeling and AI/ML as design methodology.
  • Privacy-preserving inference on AI models.
  • Prototype demonstrations in specific application domains: e.g., natural language processing and speech, protein folding, drug discovery, computer vision, code generation, music making, as well as applications of interest to defense and homeland security.

The workshop will consist of regular presentations and/or prototype demonstrations by authors of selected submissions. In addition, it will include invited keynotes by eminent researchers as well as interactive panel discussions to kindle further interest in these research topics.

Submitted manuscripts must be in English of up to 2 pages (with same formatting guidelines as main conference) indicating the type of submission: regular presentation or prototype demonstration. Submissions should be submitted to the following link.

If you have questions regarding submission, please contact us: info@cogarchworkshop.org

Call for Prototype Demonstrations

CogArch will feature a session where researchers can showcase innovative prototype demonstrations or proof-of-concept designs in the cognitive architecture space. Examples of such demonstrations may include (but are not limited to):

  • Custom ASIC or FPGA-based demonstrations of machine learning, cognitive or neuromorphic architectures.
  • Innovative implementations of state-of-the-art cognitive algorithms/applications, and the underlying software-hardware co-design techniques.
  • Demonstration of end-to-end cognitive systems comprising of edge devices backed by a cloud computing infrastructure.
  • Novel designs showcasing the adoption of emerging technologies for the design of cognitive systems.
  • Tools or frameworks to aid analysis, simulation and design of cognitive systems.
Submissions for the demonstration session may be made in the form of a 2-page manuscript highlighting key features and innovations of the prototype demonstration. Proposals accepted for demonstration during the workshop can be accompanied by a poster/short presentation. Authors should explicitly indicate that the submission is for prototype demonstration at submission time.

Important Dates

  • Paper submission deadline: April 18th May 2nd, 2025 (extended!)
  • Notification of acceptance: May 16th, 2025
  • Workshop date: June 22nd, 2025

Program Committee

  • Pradip Bose, IBM Research
  • Alper Buyuktosunoglu, IBM Research
  • Eri Ogawa, IBM Research (Tokyo)
  • Mori Ohara, IBM Research (Tokyo)
  • Karthik Swaminathan, IBM Research
  • Augusto Vega, IBM Research

Paper Submission Deadline
May 2nd, 2025

Notification Date
May 16th, 2025

Workshop Date
June 22nd, 2025

Invited Speakers:

Amir Yazdanbakhsh

Google DeepMind

Amir Yazdanbakhsh joined Google Research as a Research Scientist in 2019, following a one year AI residency. He is the co-founder and co-lead of the Machine Learning for Computer Architecture team where they leverage the recent machine learning methods and advancements to innovate and design better hardware accelerators. Amir is also interested in designing large-scale distributed systems for training machine learning applications. To that end, he leads the development of a massively large-scale distributed reinforcement learning system that scales to TPU Pod and efficiently manages thousands of actors to solve complex, real-world tasks. He received his Ph.D. degree in computer science from the Georgia Institute of Technology. His Ph.D. work has been recognized by various awards, including Microsoft PhD Fellowship and Qualcomm Innovation Fellowship.

More to come!

Program:

Coming soon!

Past Editions:

Organizers

Pradip Bose is a Distinguished Research Staff Member and manager of Efficient and Resilient Systems at IBM T. J. Watson Research Center. He has over thirty-three years of experience at IBM, and was a member of the pioneering RISC super scalar project at IBM (a pre-cursor to the first RS/6000 system product). He holds a Ph.D. degree from University of Illinois at Urbana-Champaign.

Alper Buyuktosunoglu is a Research Staff Member at IBM T. J. Watson Research Center. He has been involved in research and development work in support of IBM Power Systems and IBM z Systems in the area of high performance, reliability and power-aware computer architectures. He holds a Ph.D. degree from University of Rochester.

Eri Ogawa is a researcher at IBM Research, Tokyo, Japan. Her research interests include computer architecture, compiler, and deep learning acceleration. She has an MS from Tokyo Institute of Technology.

Mori Ohara is a Distinguished Engineer and deputy director of IBM Research – Tokyo. He has been involved in performance analysis and optimization research across system stacks from computer architecture, compiler and runtime to middleware for commercial systems, such as IBM Z Systems and IBM Power Systems. His current research interests include AI accelerators, and their compiler, runtime, and programming models. He holds M.S. and Ph.D. degrees from Stanford University.

Karthik Swaminathan is a Research Staff Member at IBM T. J. Watson Research Center. His research interests include power-aware architectures, domain-specific accelerators and emerging device technologies in processor design. He is also interested in architectures for approximate and cognitive computing, particularly in aspects related to their reliability and energy efficiency. He holds a Ph.D. degree from Penn State University.

Augusto Vega is a Research Staff Member at IBM T. J. Watson Research Center involved in research and development work in the areas of highly-reliable power-efficient embedded designs, cognitive systems and mobile computing. He holds a Ph.D. degree from Polytechnic University of Catalonia (UPC), Spain.

Interesting Links

The AI and Robotics Timeline from 1939 to date

The AI portal with the latest research activities conducted by IBM on AI

The Foundation Models portal

The What are chiplets? introductory guide

Registration

CogArch will be held in conjunction with the 52nd International Symposium on Computer Architecture (ISCA 2025). Refer to the main venue to continue with the registration process.

Event Location

Waseda University
Tokyo, Japan

Check main venue site for more information.